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A hardware approach to value function iteration

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  • Peri, Alessandro

Abstract

This paper proposes a novel approach for the computation of dynamic stochastic equilibrium models. We design an FPGA specialized in the computation of a Bellman equation via value function iteration (VFI). Our hardware approach exhibits significant speed gains vis-à-vis GPU-based data-parallelization techniques. The speed gains arise from two layers of parallelism, accessible to hardware developers: instruction-level and pipeline parallelism at the logical resources level. By and large, the paper documents significant computational speed gains from hardware specialization, so far unexplored by the macroeconomic literature.

Suggested Citation

  • Peri, Alessandro, 2020. "A hardware approach to value function iteration," Journal of Economic Dynamics and Control, Elsevier, vol. 114(C).
    • Handle: RePEc:eee:dyncon:v:114:y:2020:i:c:s0165188920300622
    DOI: 10.1016/j.jedc.2020.103894
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    References listed on IDEAS

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    7. Aldrich, Eric M. & Fernández-Villaverde, Jesús & Ronald Gallant, A. & Rubio-Ramírez, Juan F., 2011. "Tapping the supercomputer under your desk: Solving dynamic equilibrium models with graphics processors," Journal of Economic Dynamics and Control, Elsevier, vol. 35(3), pages 386-393, March.
    8. Christian Bayer & Ralph Luetticke & Lien Pham‐Dao & Volker Tjaden, 2019. "Precautionary Savings, Illiquid Assets, and the Aggregate Consequences of Shocks to Household Income Risk," Econometrica, Econometric Society, vol. 87(1), pages 255-290, January.
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    Cited by:

    1. Jesus Fernandez-Villaverde & Pablo Guerron-Quintana, 2020. "Uncertainty Shocks and Business Cycle Research," Review of Economic Dynamics, Elsevier for the Society for Economic Dynamics, vol. 37, pages 118-166, August.
    2. Joseph Farrington & Wai Keong Wong & Kezhi Li & Martin Utley, 2025. "Going faster to see further: graphics processing unit-accelerated value iteration and simulation for perishable inventory control using JAX," Annals of Operations Research, Springer, vol. 349(3), pages 1609-1638, June.
    3. Bhagath Cheela & André DeHon & Jesús Fernández‐Villaverde & Alessandro Peri, 2025. "Programming FPGAs for economics: An introduction to electrical engineering economics," Quantitative Economics, Econometric Society, vol. 16(1), pages 49-87, January.
    4. Alvaro Salazar-Perez & Hernán D. Seoane, 2025. "Perturbating and Estimating DSGE Models in Julia," Computational Economics, Springer;Society for Computational Economics, vol. 65(4), pages 2379-2396, April.

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    JEL classification:

    • C88 - Mathematical and Quantitative Methods - - Data Collection and Data Estimation Methodology; Computer Programs - - - Other Computer Software

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