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A Triple Boost Seven-Level Common Ground Transformerless Inverter Topology for Grid-Connected Photovoltaic Applications

Author

Listed:
  • Narayanan Pandurangan Gopinath

    (Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Kattankulathur, Chennai 603203, India)

  • Krishnasamy Vijayakumar

    (Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Kattankulathur, Chennai 603203, India)

  • Jagabar Sathik Mohd Ali

    (Renewable Energy Lab, College of Engineering, Prince Sultan University, Riyadh 11586, Saudi Arabia)

  • Kumutha Raghupathi

    (Department of Physics, S.A. Engineering College, Chennai 600077, India)

  • Sivakumar Selvam

    (Renewable Energy Lab, College of Engineering, Prince Sultan University, Riyadh 11586, Saudi Arabia)

Abstract

This article proposes a single-stage, seven-level (7L), switched-capacitor-based grid-connected inverter architecture with a common ground feature. This topology has the ability to boost the output voltage up to three times the input voltage. The proposed topology can diminish the leakage current in grid-connected photovoltaic (GC-PV) applications, and its capacitor voltages are self-balanced without any additional control strategies. The different operating modes are described in detail with their related mathematical expressions. The design of passive components and a detailed power loss analysis are presented. The merits of the proposed structure are demonstrated using a detailed comparative assessment. The grid-connected operation of the proposed inverter structure is simulated in the MATLAB/Simulink environment, and the results are presented. The laboratory prototype of 935 W is built and analyzed to validate the performance of the proposed structure.

Suggested Citation

  • Narayanan Pandurangan Gopinath & Krishnasamy Vijayakumar & Jagabar Sathik Mohd Ali & Kumutha Raghupathi & Sivakumar Selvam, 2023. "A Triple Boost Seven-Level Common Ground Transformerless Inverter Topology for Grid-Connected Photovoltaic Applications," Energies, MDPI, vol. 16(8), pages 1-20, April.
    • Handle: RePEc:gam:jeners:v:16:y:2023:i:8:p:3428-:d:1122757
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    References listed on IDEAS

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    1. Umashankar Subramaniam & Sagar Mahajan Bhaskar & Dhafer J.Almakhles & Sanjeevikumar Padmanaban & Zbigniew Leonowicz, 2019. "Investigations on EMI Mitigation Techniques: Intent to Reduce Grid-Tied PV Inverter Common Mode Current and Voltage," Energies, MDPI, vol. 12(17), pages 1-18, September.
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