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Invertible logic from a single chaotic system

Author

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  • Murali, K.
  • Sinha, Sudeshna

Abstract

Invertible logic allows for unique applications beyond standard digital circuits and offers significant potential for solving complex problems. In this letter, we propose to harness the chaotic attractors of a single chaotic system, specifically the Chua’s circuit, as a physical realization of a probabilistic bit (p-bit), which is a fundamental unit in invertible logic paradigms. The chaotic behavior of the circuit generates probabilistic outcomes through state variables, crucial for invertible computations. We demonstrate the successful implementation of reconfigurable invertible logic gates, including AND, NAND, OR, and NOR, through detailed numerical simulations and electronic circuit experiments, utilizing a single Chua’s circuit as a p-bit. So this demonstration underscores the potential of a single chaotic system as a viable building block for future computing architectures based on invertible logic.

Suggested Citation

  • Murali, K. & Sinha, Sudeshna, 2025. "Invertible logic from a single chaotic system," Chaos, Solitons & Fractals, Elsevier, vol. 199(P2).
  • Handle: RePEc:eee:chsofr:v:199:y:2025:i:p2:s096007792500801x
    DOI: 10.1016/j.chaos.2025.116788
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    References listed on IDEAS

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    1. William A. Borders & Ahmed Z. Pervaiz & Shunsuke Fukami & Kerem Y. Camsari & Hideo Ohno & Supriyo Datta, 2019. "Integer factorization using stochastic magnetic tunnel junctions," Nature, Nature, vol. 573(7774), pages 390-393, September.
    2. Radhakrishnan, Anil & Sinha, Sudeshna & Murali, K. & Ditto, William L., 2025. "Gradient based optimization of Chaogates," Chaos, Solitons & Fractals, Elsevier, vol. 192(C).
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