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VLSI Circuits and Approximate Computing

In: Optimization Methods in VLSI Design

Author

Listed:
  • Apoorva S. Shastri

    (Dr. Vishwanath Karad MIT World Peace University, Institute of Artificial Intelligence)

Abstract

This chapter discusses VLSI circuits and approximate computing, which are the upcoming fields in VLSI design. This chapter focuses on Tunable Memristor emulators. This is a CNFET based tuneable memristor emulator. It also discusses a VDTA based robust electronic lead tunable memristor emulator circuit along with methods that focus on analysis and characterization of leakage reduction. A multi bit soft error immune SRAM cell for low power application is also discussed in this chapter using BitMAC. Along with these a bit serial computation based efficient multiply accumulate unit. For a deep neural network accelerator is discussed. Design of low power multiplier with less area using quaternary carry. Incremental adder for newfangled processor. After that, an ultra-low power and fast voltage level shifter using Mullar C-cell for VLSI system is also discussed.

Suggested Citation

  • Apoorva S. Shastri, 2025. "VLSI Circuits and Approximate Computing," Springer Books, in: Apoorva S. Shastri (ed.), Optimization Methods in VLSI Design, chapter 0, pages 207-231, Springer.
    • Handle: RePEc:spr:sprchp:978-981-95-2457-0_7
    DOI: 10.1007/978-981-95-2457-0_7
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