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Performance and Scalability Analysis of a Chip Multi Vector Processor

In: High Performance Computing on Vector Systems 2011

Author

Listed:
  • Yoshiei Sato

    (Tohoku University, Graduate School of Information Sciences)

  • Akihiro Musa

    (NEC Corporation)

  • Ryusuke Egawa

    (Tohoku University, Cyberscience Center
    JST CREST)

  • Hiroyuki Takizawa

    (Tohoku University, Graduate School of Information Sciences
    JST CREST)

  • Koki Okabe

    (Tohoku University, Cyberscience Center)

  • Hiroaki Kobayashi

    (Tohoku University, Cyberscience Center
    JST CREST)

Abstract

To realize more efficient and powerful computations on a vector processor, a chip multi vector processor (CMVP) has been proposed as a next generation vector processor. However, the usefulness of CMVP for scientific applications has been unclear. The objective of this paper is to clarify the potential of CMVP. Although the computational performance of CMVP increases with the number of cores, the ratio of memory bandwidth to computational performance (B/F) will decrease. To cover the insufficient B/F, CMVP has a shared vector cache. Therefore, to exploit the potential of CMVP, applications for CMVP should be optimized not only with conventional tuning techniques to improve the efficiency of vector operations, but also with new techniques to effectively use the vector cache. Under this situation, this paper presents a performance tuning strategy for CMVP. The strategy analyzes the performance bottleneck of an application to find the best combination of tuning techniques. The performance and scalability improvements due to the tuning strategy are evaluated using real applications. The evaluation results clarify that performance tuning becomes more important as the number of cores increases.

Suggested Citation

  • Yoshiei Sato & Akihiro Musa & Ryusuke Egawa & Hiroyuki Takizawa & Koki Okabe & Hiroaki Kobayashi, 2011. "Performance and Scalability Analysis of a Chip Multi Vector Processor," Springer Books, in: Michael Resch & Xin Wang & Wolfgang Bez & Erich Focht & Hiroaki Kobayashi & Sabine Roller (ed.), High Performance Computing on Vector Systems 2011, pages 3-20, Springer.
    • Handle: RePEc:spr:sprchp:978-3-642-22244-3_1
    DOI: 10.1007/978-3-642-22244-3_1
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