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Architecture Design of a Single-chip Multiprocessor

In: Current Trends in High Performance Computing and Its Applications

Author

Listed:
  • Wenbin Yao

    (Tsinghua University, Department of Computer Science and Technology
    Tsinghua University, Research Institute of Information Technology)

  • Dongsheng Wang

    (Tsinghua University, Research Institute of Information Technology)

  • Weimin Zheng

    (Tsinghua University, Department of Computer Science and Technology)

  • Songliu Guo

    (Tsinghua University, Department of Computer Science and Technology)

Abstract

Single-chip multiprocessor(CMP) architecture provides an important research direction for the future microprocessors. A CMP architecture(TCMP) is put forward on the basis of the prior researches on RISC microprocessor. T-CMP integrating two MIPS-based processors is a closely coupled multiprocessor, engaging aggressive thread-level and process-level parallel techniques to improve the performance. This paper presents the key techniques of its implementation, including hardware construction and software design. A functional verification simulator is also developed to simulate the behavior of program executions in the mode of cycle-by-cycle. The results show that the design can improve the computing performance effectively.

Suggested Citation

  • Wenbin Yao & Dongsheng Wang & Weimin Zheng & Songliu Guo, 2005. "Architecture Design of a Single-chip Multiprocessor," Springer Books, in: Wu Zhang & Weiqin Tong & Zhangxin Chen & Roland Glowinski (ed.), Current Trends in High Performance Computing and Its Applications, pages 165-174, Springer.
    • Handle: RePEc:spr:sprchp:978-3-540-27912-9_16
    DOI: 10.1007/3-540-27912-1_16
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