Image Steganography Based Sobel Edge Detection Using FPGA

Now a day's Image processing is widely used in many applications. It is having many advantages. The heart of all these image processing applications is the edge detection. It is used in various applications as security application. As image sizes and bit depths grow larger, software has become less useful in the image processing; the unique architecture of the Field Programmable Gate Array (FPGA) has allowed the technology to be used in many such applications encompassing all aspects of image processing. This work presents hiding information using Sobel edge detection. The alteration in edges cannot be distinguished well so edges can hide more data without losing quality of an image. The algorithms are implemented using MATLAB environment as well as the VHDL (Very High Speed Hardware Description Language) synthesized by using ISE (Integrated Software Environment) version (12.1) software, and implemented on FPGA Spartan 3E starter kit board. And they are implemented at 8 bit grayscale image data of size 256×256 when they are applied the work on Xilinx Spartan 3E FPGA (XC3S1600E) device. The image processing algorithms is produced using the pixel windows (3×3 windows) to calculate their output The results obtained from the implementing of algorithms using VHDL were best objectively than the ones obtained by MATLAB where the comparison between the resultant image using MATLAB and VHDL shows that the two images have a high value of PSNR, that ranges between (72.1292 to 82.8174).