IDEAS home Printed from https://ideas.repec.org/a/spr/jcomop/v23y2012i2d10.1007_s10878-010-9355-1.html
   My bibliography  Save this article

The complexity of VLSI power-delay optimization by interconnect resizing

Author

Listed:
  • Konstantin Moiseev

    (Technion, Israel Institute of Technology)

  • Avinoam Kolodny

    (Technion, Israel Institute of Technology)

  • Shmuel Wimer

    (Bar-Ilan University)

Abstract

The lithography used for 32 nanometers and smaller VLSI process technologies restricts the interconnect widths and spaces to a very small set of admissible values. Until recently the sizes of interconnects were allowed to change continuously and the implied power-delay optimal tradeoff could be formulated as a convex programming problem, for which classical search algorithms are applicable. Once the admissible geometries become discrete, continuous search techniques are inappropriate and new combinatorial optimization solutions are in order. A first step towards such solutions is to study the complexity of the problem, which this paper is aiming at. Though dynamic programming has been shown lately to solve the problem, we show that it is NP-complete. Two typical VLSI design scenarios are considered. The first trades off power and sum of delays (L 1), and is shown to be NP-complete by reduction of PARTITION. The second considers power and max delays (L ∞), and is shown to be NP-complete by reduction of SUBSET_SUM.

Suggested Citation

  • Konstantin Moiseev & Avinoam Kolodny & Shmuel Wimer, 2012. "The complexity of VLSI power-delay optimization by interconnect resizing," Journal of Combinatorial Optimization, Springer, vol. 23(2), pages 292-300, February.
    • Handle: RePEc:spr:jcomop:v:23:y:2012:i:2:d:10.1007_s10878-010-9355-1
    DOI: 10.1007/s10878-010-9355-1
    as

    Download full text from publisher

    File URL: http://link.springer.com/10.1007/s10878-010-9355-1
    File Function: Abstract
    Download Restriction: Access to the full text of the articles in this series is restricted.
    File URL: https://libkey.io/10.1007/s10878-010-9355-1?utm_source=ideas
    LibKey link: if access is restricted and if your library uses this service, LibKey will redirect you to where you can use your library subscription to access this item
    ---><---

    As the access to this document is restricted, you may want to search for a different version of it.

    Corrections

    All material on this site has been provided by the respective publishers and authors. You can help correct errors and omissions. When requesting a correction, please mention this item's handle: RePEc:spr:jcomop:v:23:y:2012:i:2:d:10.1007_s10878-010-9355-1. See general information about how to correct material in RePEc.

    If you have authored this item and are not yet registered with RePEc, we encourage you to do it here. This allows to link your profile to this item. It also allows you to accept potential citations to this item that we are uncertain about.

    We have no bibliographic references for this item. You can help adding them by using this form .

    If you know of missing items citing this one, you can help us creating those links by adding the relevant references in the same way as above, for each refering item. If you are a registered author of this item, you may also want to check the "citations" tab in your RePEc Author Service profile, as there may be some citations waiting for confirmation.

    For technical questions regarding this item, or to correct its authors, title, abstract, bibliographic or download information, contact: Sonal Shukla or Springer Nature Abstracting and Indexing (email available below). General contact details of provider: http://www.springer.com .

    Please note that corrections may take a couple of weeks to filter through the various RePEc services.

    IDEAS is a RePEc service. RePEc uses bibliographic data supplied by the respective publishers.