IDEAS home Printed from https://ideas.repec.org/
MyIDEAS: Login to save this article or follow this journal

Estimating Spurious Power While Mapping K-Lut-Based Fpga Circuits

  • Ion Bucur

    ()

    (University Politehnica of Bucharest)

  • Nicolae Cupcea

    ()

    (University Politehnica of Bucharest)

  • Adrian Surpateanu

    ()

    (University Politehnica of Bucharest)

  • Cornel Popescu

    ()

    (University Politehnica of Bucharest)

Registered author(s):

    In this paper is presented a new approach for decreasing the spurious power consumption in K-LUT based FPGA implemented circuits. The approach is based on selective collapsing nodes in a direct acyclic graph (DAG) representing combinational or synchronous sequential circuits. It was used the simulation-based approach that estimates, using Monte Carlo experiment, the spurious switching activity of each net in the circuit. Traversing circuits in topological order, step by step best K-feasible cone are computed at the output of each node. Preserving the best depth of the circuits the mapping stage is done searching to minimize spurious switching power.

    If you experience problems downloading a file, check if you have the proper application to view it first. In case of further problems read the IDEAS help page. Note that these files are not on the IDEAS site. Please be patient as the files may be large.

    File URL: http://www.rebe.rau.ro/RePEc/rau/jisomg/SU09/JISOM-WI09-A8.pdf
    Download Restriction: no

    Article provided by Romanian-American University in its journal Journal of Information Systems and Operations Management.

    Volume (Year): 3 (2009)
    Issue (Month): 2 (December)
    Pages: 388-397

    as
    in new window

    Handle: RePEc:rau:jisomg:v:3:y:2009:i:2:p:388-397
    Contact details of provider: Postal: Bd.Expozitiei 1B, Bucuresti, Sector 1, Etaj 5, 012101
    Phone: +4-0372-120.140
    Fax: +4-021-202.91.51
    Web page: http://www.rau.ro/
    Email:


    More information through EDIRC

    No references listed on IDEAS
    You can help add them by filling out this form.

    This item is not listed on Wikipedia, on a reading list or among the top items on IDEAS.

    When requesting a correction, please mention this item's handle: RePEc:rau:jisomg:v:3:y:2009:i:2:p:388-397. See general information about how to correct material in RePEc.

    For technical questions regarding this item, or to correct its authors, title, abstract, bibliographic or download information, contact: (Alex Tabusca)

    If you have authored this item and are not yet registered with RePEc, we encourage you to do it here. This allows to link your profile to this item. It also allows you to accept potential citations to this item that we are uncertain about.

    If references are entirely missing, you can add them using this form.

    If the full references list an item that is present in RePEc, but the system did not link to it, you can help with this form.

    If you know of missing items citing this one, you can help us creating those links by adding the relevant references in the same way as above, for each refering item. If you are a registered author of this item, you may also want to check the "citations" tab in your profile, as there may be some citations waiting for confirmation.

    Please note that corrections may take a couple of weeks to filter through the various RePEc services.

    This information is provided to you by IDEAS at the Research Division of the Federal Reserve Bank of St. Louis using RePEc data.