Improving dependability with low power fault detection model for skinny-hash

The increasing popularity and prevalence of Internet of Things (IoT) applications have led to the widespread use of IoT devices. These devices gather information from their environment and send it across a network. IoT devices are unreliable due to their susceptibility to defect that arise intentionally or spontaneously. IoT devices must be dependable and secure since they form an integral part of the network that connects millions of connected objects. IoT devices are secured by cryptographic algorithms, but their dependability is a major concern. Concurrent error detection (CED) techniques, sometimes referred to as fault detection techniques, are extensively employed to enhance the dependability of embedded devices. Two fault detection approaches are proposed to detect faults in cryptographic algorithms running on IoT devices. Recomputing with complemented operands (RECO) and Double modular redundancy with complemented operands (DMRC) is proposed. Generally, IoT applications deploy resource-constrained devices and cannot support high-level security techniques. Therefore, the mentioned fault detection technique is assimilated for the lightweight SKINNY block cipher. The resource-sharing concept is applied to the SKINNY block cipher to reduce area overhead caused by DMRC. The SKINNY-Hash function construct is described using Very Large-Scale Hardware Description Language (VHDL). Functional behaviour is tested using ModelSim SE-64. The proposed architecture is synthesised using the Genus synthesis tool by Cadence, and area-power reports are generated. The proposed work is compared with the other CED techniques in terms of area and power consumption, and the work proves to have less overhead.