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An area efficient and high throughput implementation of layered min-sum iterative construction a posteriori probability LDPC decoder

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  • Hasnain Raza
  • Syed Azhar Ali Zaidi
  • Aamir Rashid
  • Shafiq Haider

Abstract

Area efficient and high speed forward error correcting codes decoder are the demand of many high speed next generation communication standards. This paper explores a low complexity decoding algorithm of low density parity check codes, called the min-sum iterative construction a posteriori probability (MS-IC-APP), for this purpose. We performed the error performance analysis of MS-IC-APP for a (648,1296) regular QC-LDPC code and proposed an area and throughput optimized hardware implementation of MS-IC-APP. We proposed to use the layered scheduling of MS-IC-APP and performed other optimizations at architecture level to reduce the area and to increase the throughput of the decoder. Synthesis results show 6.95 times less area and 4 times high throughput as compared to the standard min-sum decoder. The area and throughput are also comparable to the improved variants of hard-decision bit-flipping (BF) decoders, whereas, the simulation results show a coding gain of 2.5 over the best implementation of BF decoder in terms of error performance.

Suggested Citation

  • Hasnain Raza & Syed Azhar Ali Zaidi & Aamir Rashid & Shafiq Haider, 2021. "An area efficient and high throughput implementation of layered min-sum iterative construction a posteriori probability LDPC decoder," PLOS ONE, Public Library of Science, vol. 16(3), pages 1-12, March.
    • Handle: RePEc:plo:pone00:0249269
    DOI: 10.1371/journal.pone.0249269
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