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Sub-kBT micro-electromechanical irreversible logic gate

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  • M. López-Suárez

    (NiPS Laboratory, Università degli Studi di Perugia—via Pascoli)

  • I. Neri

    (NiPS Laboratory, Università degli Studi di Perugia—via Pascoli
    INFN Sezione di Perugia—via Pascoli)

  • L. Gammaitoni

    (NiPS Laboratory, Università degli Studi di Perugia—via Pascoli)

Abstract

In modern computers, computation is performed by assembling together sets of logic gates. Popular gates like AND, OR and XOR, processing two logic inputs and yielding one logic output, are often addressed as irreversible logic gates, where the sole knowledge of the output logic value is not sufficient to infer the logic value of the two inputs. Such gates are usually believed to be bounded to dissipate a finite minimum amount of energy determined by the input–output information difference. Here we show that this is not necessarily the case, by presenting an experiment where a OR logic gate, realized with a micro-electromechanical cantilever, is operated with energy well below the expected limit, provided the operation is slow enough and frictional phenomena are properly addressed.

Suggested Citation

  • M. López-Suárez & I. Neri & L. Gammaitoni, 2016. "Sub-kBT micro-electromechanical irreversible logic gate," Nature Communications, Nature, vol. 7(1), pages 1-6, November.
  • Handle: RePEc:nat:natcom:v:7:y:2016:i:1:d:10.1038_ncomms12068
    DOI: 10.1038/ncomms12068
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