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Design of Alu-Based Symmetric Transparent Online BIST for RAM

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  • V. Rajendra Chary

Abstract

A 3-bit RAM is tested using 5-bit ALU with the help of symmetric transparent online BIST scheme. This architecture skips signature prediction. It also reduces test time. If the RAM output consists if all 1’s, then it indicates that there is no error in the RAM module, otherwise it indicates that there is an error. The implemented scheme utilizes an ALU in order to generate the test pattern and compress the responses of the memory module, the word width of memory can be smaller than the number of stages of ALU. Hence multiple non-identical memories can also be tested in a pipeline way. All synthesis and simulation results are performed using xilinx14.2 ISE

Suggested Citation

  • V. Rajendra Chary, 2017. "Design of Alu-Based Symmetric Transparent Online BIST for RAM," International Journal of Scientific Research in Computer Science, Engineering and Information Technology, International Journal of Scientific Research in Computer Science, Engineering and Information Technology, vol. 2(4), pages 729-732, August.
    • Handle: RePEc:jbh:ijsrcs:v2:y2017:i4:id:hcseit1172494
    Note: Article URL: https://ijsrcseit.com/CSEIT1172494
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