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A Review Paper on Multiplier Algorithms for VLSI Technology

Author

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  • Kajal Agrawal
  • Milind Shah
  • Gaurav Asari

Abstract

In the era of digitalization, it is required to increase the speed of digital circuits while reducing area and power consumption. In any digital system, multiplication is a key element. One of the important parameter which affects the performance of entire system is performance of multiplier unit. Therefore, it is required to design efficient multiplier unit. To improve the efficiency of multiplier unit, it’s needed to optimize various parameters such as speed and area. There are different multiplier algorithms discussed and compared in this paper for performance optimization.

Suggested Citation

  • Kajal Agrawal & Milind Shah & Gaurav Asari, 2018. "A Review Paper on Multiplier Algorithms for VLSI Technology," International Journal of Scientific Research in Science, Engineering and Technology, International Journal of Scientific Research in Science, Engineering and Technology, vol. 4(2), pages 205-209, January.
    • Handle: RePEc:ijs:ijsrse:v4:y2018:i2:id:hijsrset184233
    Note: Article URL: https://ijsrset.com/IJSRSET184233
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