A High-Performance Parallelization and Load-Balancing Approach for Modern Power-Systems

Due to the recent trends of chip-miniaturization, the performance of a single-core is plateauing and hence, improving the performance of serial-execution based legacy code has become challenging. Since the expansion in power system operation continues to increase the number of contingencies to be examined, serial-execution platforms present a crucial bottleneck in analyzing sufficiently large number of contingencies within a reasonably small time for performing power-system stability analysis. This paper presents an approach to parallelize power system contingency analysis over multicore processors using Chapel language. To achieve load-balancing for avoiding wastage of computation resources, the authors use efficient work-stealing scheduling. They discuss the important features of Chapel and design choices which enable us to achieve high performance gains. The approach is evaluated using hundreds of contingencies of a large 13029-bus power system. The authors compare the performance of serial-execution with that obtained using 2, 4, 8 and 16 threads. The simulation results have shown that the approach outperforms a conventional scheduling technique, namely master-slave scheduling and also scales effectively with increasing number of threads. It is believed that the performance gains obtained from the approach would be highly useful for control center operators in analyzing a large number of contingencies and thus taking suitable corrective and preventive action against catastrophic events. Also, the insights gained from these experiments will be useful in several business enterprises.