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An Easy-to-Integrate IP Design of AHB Slave Bus Interface for the Security Chip of IoT

Author

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  • Conggui Yuan
  • Xin Zheng
  • Bo Rao
  • Shuting Cai

Abstract

Information security is fundamental to the Internet of things (IoT) devices, in which security chip is an important means. This paper proposes an Advanced High-performance Bus Slave Control IP (AHB-SIP), which applies to cryptographic accelerators in IoT security chips. Composed by four types of function registers and AHB Interface Control Logic (AICL), AHB-SIP has a simple and easy-to-use structure. The System on Chip (SoC) design can be realized by quickly converting the nonstandard interface of the security module to the AHB slave interface. AHB-SIP is applied to the security accelerators of SM2, SM3, and SM4 and random number generator (RNG). Combined with a low-power embedded CPU, TIMER, UART, SPI, IIC, and other communication interfaces, a configurable SoC can be integrated. Moreover, SMIC 110 nm technology is employed to tape out the SoC on a silicon chip. The area of AHB-SIP is 0.072 mm 2 , only occupying 6‰ of the chip (3.45 3.45 mm 2 ), and the power consumption of encryption modules combined with AHB-SIP is lower than that combined with AXI interface, which is decreased up to 61.0% and is ideal for the application of IoT.

Suggested Citation

  • Conggui Yuan & Xin Zheng & Bo Rao & Shuting Cai, 2021. "An Easy-to-Integrate IP Design of AHB Slave Bus Interface for the Security Chip of IoT," Mathematical Problems in Engineering, Hindawi, vol. 2021, pages 1-11, November.
  • Handle: RePEc:hin:jnlmpe:5154769
    DOI: 10.1155/2021/5154769
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