An Evaluation of Three-Phase Cascaded H-Bridge and Neutral Point Clamped Inverters with Seven Levels

In this paper, a seven-level cascaded H-bridge (CHB) and neutral point-clamped multilevel inverter architectures designed for grid-linked medium-voltage systems are analysed in detail. The approach, covering the simulation setting up, techniques for control, and total harmonic distortion (THD) computations, is thoroughly explained in this work, along with an overview and a detailed description of its innovation and achievements. THD evaluations, switching loss estimations based on instrument count and element voltage stress, and data-supported findings are among the analytical assessments offered. The main conclusions indicate that the Cascaded H-Bridge (CHB) configuration provides a lower line-to-line voltage THD and lower calculated switching losses when switching frequencies and methods of modulation are the same. Nevertheless, the CHB layout needs many separate Direct Current (DC) resources, which raises the semiconductor count. Conversely, neutral-point-clamped (NPC) layouts lessen the demand for independent power sources, but they come with challenges such as split common-mode voltage at load terminals, complex capacitor voltage weighing, and DC-link stresses. The present research statistically evaluated three-phase, seven-level CHB, and NPC inverter setups running at 380 V and fifty Hz in a manufacturing facility. Both layouts were designed and simulated using MATLAB/Simulink simulates according to similar loading and functioning settings in order to give a reliable and equitable comparison.