Learning memristor switching degradation dynamics with neural models

Memristors hold promise for dense nonvolatile memory and in-memory learning, but practical use is limited by stochastic switching and poorly characterized long-term degradation. We formulate an actionable reliability task, time-to-sticking (TTS) prediction, where the goal is to estimate the remaining number of SET/RESET cycles before a transient state-pinning event. We present MemRUL, a lightweight CNN–Transformer regressor that consumes short windows of raw switching current and predicts TTS directly from local intra-cycle motifs and their cross-cycle evolution. Using measured datasets of four ZrO2(Y)-based devices with 107 switching, we validate the model under strict chronological protocols. On held-out bands of a long trajectory with the cycle index withheld, MemRUL reliably tracks the monotonic decline of TTS, confirming that it senses degradation signals despite switching stochasticity. On disjoint sticking episodes extracted from long runs, the model attains MAE = 1137 cycles of accuracy within the last 104-cycle horizon. MemRUL outperforms neural network baselines, showing the effectiveness of the proposed architecture. Gradient-based saliency of model-input current points emphasizes switching knees, post-switch relaxation, and near-zero-current intervals consistent with filamentary valence-change physics. These results demonstrate that short, local current traces contain sufficient data for accurate and interpretable TTS estimation, enabling predictive maintenance and efficient endurance estimation for memristive systems.