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A provably tight delay-driven concurrently congestion mitigating global routing algorithm

Author

Listed:
  • Samanta, Radhamanjari
  • Erzin, Adil I.
  • Raha, Soumyendu
  • Shamardin, Yuriy V.
  • Takhonov, Ivan I.
  • Zalyubovskiy, Vyacheslav V.

Abstract

Routing is a very important step in VLSI physical design. A set of nets are routed under delay and resource constraints in multi-net global routing. In this paper a delay-driven congestion-aware global routing algorithm is developed, which is a heuristic based method to solve a multi-objective NP-hard optimization problem. The proposed delay-driven Steiner tree construction method is of O(n2logn) complexity, where n is the number of terminal points and it provides n-approximation solution of the critical time minimization problem for a certain class of grid graphs. The existing timing-driven method (Hu and Sapatnekar, 2002) has a complexity O(n4) and is implemented on nets with small number of sinks. Next we propose a FPTAS Gradient algorithm for minimizing the total overflow. This is a concurrent approach considering all the nets simultaneously contrary to the existing approaches of sequential rip-up and reroute. The algorithms are implemented on ISPD98 derived benchmarks and the drastic reduction of overflow is observed.

Suggested Citation

  • Samanta, Radhamanjari & Erzin, Adil I. & Raha, Soumyendu & Shamardin, Yuriy V. & Takhonov, Ivan I. & Zalyubovskiy, Vyacheslav V., 2015. "A provably tight delay-driven concurrently congestion mitigating global routing algorithm," Applied Mathematics and Computation, Elsevier, vol. 255(C), pages 92-104.
    • Handle: RePEc:eee:apmaco:v:255:y:2015:i:c:p:92-104
    DOI: 10.1016/j.amc.2014.11.062
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