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Performance Evaluation of a Three Phase Nine Level Inverter with Reduced Switch Count

Author

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  • Balamurugan C.R.

    (Department of Electrical & Electronics Engineering, Arunai Engineering College, Tiruvannamalai, Tamilnadu, India)

  • Natarajan S.P.

    (Department of EIE, Annamalai University, Chidambaram, Tamil nadu, India)

  • Pavithra S.

    (Department of Electrical & Electronics Engineering, Arunai Engineering College, Tiruvannamalai, Tamilnadu, India)

Abstract

This paper presents a three phase nine level cascaded H-bridge (CHB) multilevel inverter with RL load. A sinusoidal and trapezoidal PWM method is used to achieve minimum total harmonics distortion (THD) in the output current of multilevel inverters. The analysis of the output current harmonics is carried out and compared with the seven level conventional cascaded H-bridge inverters. The proposed inverter is verified through simulation and the simulation results are compared with the conventional multilevel inverter. From the result the proposed inverter offers much less total harmonic distortion.

Suggested Citation

  • Balamurugan C.R. & Natarajan S.P. & Pavithra S., 2015. "Performance Evaluation of a Three Phase Nine Level Inverter with Reduced Switch Count," Scientific Review, Academic Research Publishing Group, vol. 1(1), pages 5-15, 06-2015.
    • Handle: RePEc:arp:srarsr:2015:p:5-15
    DOI: arpgweb.com/?ic=journal&journal=10&info=aims
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    Keywords

    THD; CHB; Three phase inverter.;
    All these keywords.

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