IDEAS home Printed from https://ideas.repec.org/a/inm/oropre/v43y1995i3p444-457.html
   My bibliography  Save this article

Component Fixture Positioning/Sequencing for Printed Circuit Board Assembly with Concurrent Operations

Author

Listed:
  • Javad Ahmadi

    (IBM Systems Technology, Austin, Texas)

  • Reza Ahmadi

    (University of California, Los Angeles, California)

  • Hirofumi Matsuo

    (The University of Texas at Austin, Austin, Texas)

  • Devanath Tirupati

    (The University of Texas at Austin, Austin, Texas)

Abstract

This paper considers the problem of positioning component fixtures on the carriers of computer, numerically controlled dual delivery machines used for populating printed circuit boards with surface mounted technology. This reel positioning problem ( RPP ) is one of a series of optimization problems that are critical for improving system productivity and realizing the full potential of concurrent operations. We formulate the RPP as a mathematical program and establish its complexity. Since the problem is NP-complete we focus on the development of heuristics. Our solution procedure was prompted by engineering considerations that included concerns for minimizing the changes in the carrier direction and total movement. We also present encouraging results with test problems. The method has been implemented and achieved 7 to 8% reductions in cycle time.

Suggested Citation

  • Javad Ahmadi & Reza Ahmadi & Hirofumi Matsuo & Devanath Tirupati, 1995. "Component Fixture Positioning/Sequencing for Printed Circuit Board Assembly with Concurrent Operations," Operations Research, INFORMS, vol. 43(3), pages 444-457, June.
    • Handle: RePEc:inm:oropre:v:43:y:1995:i:3:p:444-457
    DOI: 10.1287/opre.43.3.444
    as

    Download full text from publisher

    File URL: http://dx.doi.org/10.1287/opre.43.3.444
    Download Restriction: no
    File URL: https://libkey.io/10.1287/opre.43.3.444?utm_source=ideas
    LibKey link: if access is restricted and if your library uses this service, LibKey will redirect you to where you can use your library subscription to access this item
    ---><---

    Citations

    Citations are extracted by the CitEc Project, subscribe to its RSS feed for this item.
    as


    Cited by:

    1. Gronalt, M. & Grunow, M. & Gunther, H. O. & Zeller, R., 1997. "A heuristic for component switching on SMT placement machines," International Journal of Production Economics, Elsevier, vol. 53(2), pages 181-190, November.
    2. Ayob, Masri & Kendall, Graham, 2008. "A survey of surface mount device placement machine optimisation: Machine classification," European Journal of Operational Research, Elsevier, vol. 186(3), pages 893-914, May.
    3. T Knuutila & S Pyöttiälä & O S Nevalainen, 2007. "Minimizing the number of pickups on a multi-head placement machine," Journal of the Operational Research Society, Palgrave Macmillan;The OR Society, vol. 58(1), pages 115-121, January.
    4. Klomp, Cornelis & van de Klundert, Joris & Spieksma, Frits C. R. & Voogt, Siem, 2000. "The feeder rack assignment problem in PCB assembly: A case study," International Journal of Production Economics, Elsevier, vol. 64(1-3), pages 399-407, March.
    5. Altinkemer, Kemal & Kazaz, Burak & Koksalan, Murat & Moskowitz, Herbert, 2000. "Optimization of printed circuit board manufacturing: Integrated modeling and algorithms," European Journal of Operational Research, Elsevier, vol. 124(2), pages 409-421, July.
    6. Sun, Dong-Seok & Lee, Tae-Eog & Kim, Kyung-Hoon, 2005. "Component allocation and feeder arrangement for a dual-gantry multi-head surface mounting placement tool," International Journal of Production Economics, Elsevier, vol. 95(2), pages 245-264, February.
    7. Anantaram Balakrishnan & François Vanderbeck, 1999. "A Tactical Planning Model for Mixed-Model Electronics Assembly Operations," Operations Research, INFORMS, vol. 47(3), pages 395-409, June.
    8. George J. Kyparisis & Christos Koulamas, 2002. "Assembly-Line Scheduling with Concurrent Operations and Parallel Machines," INFORMS Journal on Computing, INFORMS, vol. 14(1), pages 68-80, February.
    9. Choudhury, Nilanjan D. & Wilhelm, Wilbert E. & Rao, Brijesh & Gott, Jonathan & Khotekar, Nikhilesh, 2007. "Process planning for circuit card assembly on a series of dual head placement machines," European Journal of Operational Research, Elsevier, vol. 182(2), pages 626-639, October.
    10. Ma, N., 2014. "Optimal scope of supply chain network & operations design," Other publications TiSEM e6187708-b664-44bf-aef8-f, Tilburg University, School of Economics and Management.
    11. Ashayeri, J. & Selen, W., 2007. "A planning and scheduling model for onsertion in printed circuit board assembly," European Journal of Operational Research, Elsevier, vol. 183(2), pages 909-925, December.

    Corrections

    All material on this site has been provided by the respective publishers and authors. You can help correct errors and omissions. When requesting a correction, please mention this item's handle: RePEc:inm:oropre:v:43:y:1995:i:3:p:444-457. See general information about how to correct material in RePEc.

    If you have authored this item and are not yet registered with RePEc, we encourage you to do it here. This allows to link your profile to this item. It also allows you to accept potential citations to this item that we are uncertain about.

    We have no bibliographic references for this item. You can help adding them by using this form .

    If you know of missing items citing this one, you can help us creating those links by adding the relevant references in the same way as above, for each refering item. If you are a registered author of this item, you may also want to check the "citations" tab in your RePEc Author Service profile, as there may be some citations waiting for confirmation.

    For technical questions regarding this item, or to correct its authors, title, abstract, bibliographic or download information, contact: Chris Asher (email available below). General contact details of provider: https://edirc.repec.org/data/inforea.html .

    Please note that corrections may take a couple of weeks to filter through the various RePEc services.

    IDEAS is a RePEc service. RePEc uses bibliographic data supplied by the respective publishers.