IDEAS home Printed from https://ideas.repec.org/a/rau/jisomg/v2y2008i1p154-165.html
   My bibliography  Save this article

Optimizing Large Combinational Networks For K-Lut Based Fpga Mapping

Author

Listed:
  • Ion I. BUCUR

    (University Politehnica of Bucharest)

  • Ioana FĂGĂRĂŞAN

    (University Politehnica of Bucharest)

  • Cornel POPESCU

    (University Politehnica of Bucharest)

  • George CULEA

    (University of Bacǎu, Faculty of Electrical Engineering)

  • Alexandru E. ŞUŞU

    (Swiss Federal Institute of Technology Lausanne)

Abstract

Optimizing by partitioning is a central problem in VLSI design automation, addressing circuit’s manufacturability. Circuit partitioning has multiple applications in VLSI design. One of the most common is that of dividing combinational circuits (usually large ones) that will not fit on a single package among a number of packages. Partitioning is of practical importance for k-LUT based FPGA circuit implementation. In this work is presented multilevel a multi-resource partitioning algorithm for partitioning large combinational circuits in order to efficiently use existing and commercially available FPGAs packages

Suggested Citation

  • Ion I. BUCUR & Ioana FĂGĂRĂŞAN & Cornel POPESCU & George CULEA & Alexandru E. ŞUŞU, 2008. "Optimizing Large Combinational Networks For K-Lut Based Fpga Mapping," Journal of Information Systems & Operations Management, Romanian-American University, vol. 2(1), pages 154-165, July.
    • Handle: RePEc:rau:jisomg:v:2:y:2008:i:1:p:154-165
    as

    Download full text from publisher

    File URL: http://www.rebe.rau.ro/RePEc/rau/jisomg/SU08/JISOM-SU08-A15.pdf
    Download Restriction: no
    ---><---

    Corrections

    All material on this site has been provided by the respective publishers and authors. You can help correct errors and omissions. When requesting a correction, please mention this item's handle: RePEc:rau:jisomg:v:2:y:2008:i:1:p:154-165. See general information about how to correct material in RePEc.

    If you have authored this item and are not yet registered with RePEc, we encourage you to do it here. This allows to link your profile to this item. It also allows you to accept potential citations to this item that we are uncertain about.

    We have no bibliographic references for this item. You can help adding them by using this form .

    If you know of missing items citing this one, you can help us creating those links by adding the relevant references in the same way as above, for each refering item. If you are a registered author of this item, you may also want to check the "citations" tab in your RePEc Author Service profile, as there may be some citations waiting for confirmation.

    For technical questions regarding this item, or to correct its authors, title, abstract, bibliographic or download information, contact: Alex Tabusca (email available below). General contact details of provider: https://edirc.repec.org/data/firauro.html .

    Please note that corrections may take a couple of weeks to filter through the various RePEc services.

    IDEAS is a RePEc service. RePEc uses bibliographic data supplied by the respective publishers.