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Bin covering algorithms in the second stage of the lot to order matching problem

Author

Listed:
  • M Carlyle

    (Arizona State University)

  • K Knutson

    (Arizona State University)

  • J Fowler

    (Arizona State University)

Abstract

We formulate the problem of effectively assigning semiconductor fabrication wafer lots to customer orders of various sizes, or the lot-to-order matching problem, as an integer programming problem. Our goal in this paper is to develop an efficient, practical method for solving this problem for various performance measures. Because of its complexity we decompose the problem into a knapsack problem coupled with a generalized bin-covering problem, and solve these subproblems sequentially using heuristic methods. We restrict our attention to solution methods for the less-common second subproblem, and analyze the performance of several heuristics using a data set representative of real situations in a semiconductor back-end. Based on this analysis, we show that these heuristics perform significantly better than current industrial practice in the context of the overall problem.

Suggested Citation

  • M Carlyle & K Knutson & J Fowler, 2001. "Bin covering algorithms in the second stage of the lot to order matching problem," Journal of the Operational Research Society, Palgrave Macmillan;The OR Society, vol. 52(11), pages 1232-1243, November.
    • Handle: RePEc:pal:jorsoc:v:52:y:2001:i:11:d:10.1057_palgrave.jors.2601222
    DOI: 10.1057/palgrave.jors.2601222
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    Cited by:

    1. Ng, Tsan Sheng & Sun, Yang & Fowler, John, 2010. "Semiconductor lot allocation using robust optimization," European Journal of Operational Research, Elsevier, vol. 205(3), pages 557-570, September.

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