Solutions For Optimizing The Data Parallel Prefix Sum Algorithm Using The Compute Unified Device Architecture
AbstractIn this paper, we analyze solutions for optimizing the data parallel prefix sum function using the Compute Unified Device Architecture (CUDA) that provides a viable solution for accelerating a broad class of applications. The parallel prefix sum function is an essential building block for many data mining algorithms, and therefore its optimization facilitates the whole data mining process. Finally, we benchmark and evaluate the performance of the optimized parallel prefix sum building block in CUDA.
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Bibliographic InfoArticle provided by Romanian-American University in its journal Journal of Information Systems and Operations Management.
Volume (Year): 5 (2011)
Issue (Month): 2.1 (December)
CUDA; threads; GPGPU; parallel prefix sum; parallel processing; task synchronization; warp;
Please report citation or reference errors to , or , if you are the registered author of the cited work, log in to your RePEc Author Service profile, click on "citations" and make appropriate adjustments.:
- Alexandru PIRJAN, 2010. "Improving Software Performance in the Compute Unified Device Architecture," Informatica Economica, Academy of Economic Studies - Bucharest, Romania, vol. 14(4), pages 30-47.
- Alexandru Pîrjan & Dana-Mihaela Petroşanu, 2012. "Solutions For Optimizing The Radix Sort Algorithmic Function Using The Compute Unified Device Architecture," Romanian Economic Business Review, Romanian-American University, vol. 6(2), pages 344-358, December.
- Dana-Mihaela Petroşanu & Alexandru Pîrjan, 2012. "Economic Considerations Regarding The Opportunity Of Optimizing Data Processing Using Graphics Processing Units," Romanian Economic Business Review, Romanian-American University, vol. 6(1), pages 204-215, May.
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